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ic验证岗位要求4篇

发布时间:2022-11-25 热度:25

ic验证岗位要求

第1篇 高级ic验证工程师岗位职责任职要求

高级ic验证工程师岗位职责

ic验证高级工程师 采微科技 上海采微电子科技有限公司 1.​develop test plans, tests and verification infrastructure for comple_ ip's/sub-system/soc's

2.​create verification environment for both directed and random verification

3.​create reusable bus functional models, monitors, checkers and scoreboards

4.​drive functional coverage driven verification closure

5.​work with architects, designers and post-silicon teams

任职条件

1.​ms with 5+ or 3+ years of e_perience in design verification

2.​e_perience with risc cpu (riscv/mips/arm) related ips verification are highly desirable

3.​e_perience with usb/mipi_csi/mipi_dsi or other high speed interface ips verification are highly desirable

4.​e_perience with deep learning accelerator related ips verification are highly desirable

5.​e_cellent knowledge of popular eda simulation tools (vcs or equivalent simulation tools, debug tools like debussy, simvision)

6.​e_perience in system verilog or similar hvl is highly desirable

7.​c++ programming language e_perience desirable

8.​scripting knowledge (perl/shell)

9.​e_cellent communication skills and ability to lead highly competent team.

高级ic验证工程师岗位

第2篇 ic验证工程师职位描述与岗位职责任职要求

职位描述:

1. 工作内容:

a)负责芯片或ip的验证相关工作;

b)验证环境和相关脚本的开发和维护;

c)与设计人员合作,协调验证的相关工作;

2.岗位需求:

a)硕士学历,3到5年工作经验;

b)精通systemverilog和uvm验证方法学;

c)熟悉相关eda工具;

d)有soc层次验证环境开发经验优先。

第3篇 ic验证岗位职责任职要求

ic验证岗位职责

工作内容:

a) 负责芯片或ip的验证相关工作;

b) 验证环境和相关脚本的开发和维护;

c) 与设计人员合作,协调验证的相关工作;

2. 岗位需求:

a) 硕士学历,3到5年工作经验;

b) 精通systemverilog和uvm验证方法学;

c) 熟悉相关eda工具;

d) 有soc层次验证环境开发经验优先。

ic验证岗位

第4篇 高级asic验证工程师职位描述与岗位职责任职要求

职位描述:

岗位职责:

搭建模块级和系统级uvm验证环境

根据设计需求文档制定模块级和系统级验证方案,跟设计工程师一起审查设计和验证

验证整个设计,调试各种错误与设计中的bug

管理验证的审查,建立代码质量的标准

岗位要求:

硕士及以上学历,三年以上相关工作经验

精通verilog,systemverilog,sva及脚本语言(perl, shell等)

精通uvm验证的工具和环境

有视频编解码,图像处理和外设(mipi、usb,存储控制器等)调试经验者优先

具有较强的沟通、学习和撰写英文文档的能力

responsibilities:

build system and unit-level uvm verification environment

create system and unit-level verification plans from specification and review with design engineers

debug failures and manage bug tracking

conduct verification reviews and set standard for coding quality

qualifications:

master degree or above, with 3+ years working e_perience

proficiency in system verilog, object oriented programming, scripting languages

e_perience in uvm development a plus

e_perience in debugging designs of video codec, isp and peripherals (mipi, usb, memory controller, etc.) is a plus

e_cellent written, verbal and presentation skills

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